----------------------------------------------------------------------
-- Bit serial vector quantization top level unit
-- Stephen West, James Carroll
-- BYU ECEn 620, Fall 2008
----------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
	use ieee.numeric_std.all;
	
entity BitSerialTop is
	generic(
		word_length:integer:=8;
		code_vector_length:integer:=16;
		system_word_length:integer:=12;
		PEs_per_chip:integer:=256
	);
	port(
			-- Inputs
			clk, config_ctrl_in, index_data, error_in, index_in, lsb_in:in std_logic;
			 pixels_in, config_data :in std_logic_vector(code_vector_length-1 downto 0);
			 -- Outputs
			 config_ctrl_out, error_out, index_out, lsb_out: out std_logic;
			 pixels_out:out std_logic_vector(code_vector_length-1 downto 0)
	);
end entity;

architecture BitSerialTop of BitSerialTop is
	type SixteenByNumberOfPEs is array(PEs_per_chip downto 0) of std_logic_vector(code_vector_length-1 downto 0);
	signal pixels_interconnect: SixteenByNumberOfPEs;
	signal index_interconnect, config_ctrl_interconnect, lsb_interconnect, error_interconnect : std_logic_vector(PEs_per_chip downto 0);

component PE is
	generic(
		word_length:integer:=8;
		code_vector_length:integer:=16;
		system_word_length:integer:=12
	);
	port(
			clk, config_ctrl_in, index_data, error_in, index_in, lsb_in:in std_logic;
			 pixels_in, config_data :in std_logic_vector(code_vector_length-1 downto 0);
			 config_ctrl_out, error_out, index_out, lsb_out: out std_logic;
			 pixels_out:out std_logic_vector(code_vector_length-1 downto 0)
	);
end component;

begin


	-- First PE
	config_ctrl_interconnect(0)<=config_ctrl_in;
	error_interconnect(0)<=error_in;
	index_interconnect(0)<=index_in;
	lsb_interconnect(0)<=lsb_in;
	pixels_interconnect(0)<=pixels_in;
	
	PEs : for N in 0 to PEs_per_chip-1 generate
		PE_N : PE
	port map(
			-- Broadcast signals
			clk=>clk,
			index_data=>index_data,
			config_data=>config_data,
			-- Interconnect
		        -- inputs
			config_ctrl_in=>config_ctrl_interconnect(N),
			error_in=>error_interconnect(N),
			index_in=>index_interconnect(N),
			lsb_in=>lsb_interconnect(N),
			pixels_in=>pixels_interconnect(N),
		        -- outputs
			config_ctrl_out=>config_ctrl_interconnect(N+1),
			error_out=>error_interconnect(N+1),
			index_out=>index_interconnect(N+1),
			lsb_out=>lsb_interconnect(N+1),
			pixels_out=>pixels_interconnect(N+1)
	);
	end generate;
	
	-- Last PE
	config_ctrl_out<=config_ctrl_interconnect(PEs_per_chip);
	error_out<=error_interconnect(PEs_per_chip);
	index_out<=index_interconnect(PEs_per_chip);
	lsb_out<=error_interconnect(PEs_per_chip);
	pixels_out<=pixels_interconnect(PEs_per_chip);
    

end architecture;
